Up To Date Scaling of MOS Circuits MCQs ( VLSI ) MCQs – Latest VLSI MCQs

Latest VLSI MCQs

By practicing these MCQs of Scaling of MOS Circuits MCQs ( VLSI ) MCQs – Latest Competitive MCQs , an individual for exams performs better than before. This post comprising of objective questions and answers related to “ Scaling of MOS Circuits MCQs ( VLSI ) Mcqs “. As wise people believe “Perfect Practice make a Man Perfect”. It is therefore practice these mcqs of VLSI to approach the success. Tab this page to check ” Scaling of MOS Circuits MCQs ( VLSI )” for the preparation of competitive mcqs, FPSC mcqs, PPSC mcqs, SPSC mcqs, KPPSC mcqs, AJKPSC mcqs, BPSC mcqs, NTS mcqs, PTS mcqs, OTS mcqs, Atomic Energy mcqs, Pak Army mcqs, Pak Navy mcqs, CTS mcqs, ETEA mcqs and others.

VLSI MCQs – Scaling of MOS Circuits MCQs ( VLSI ) MCQs

The most occurred mcqs of Scaling of MOS Circuits MCQs ( VLSI ) in past papers. Past papers of Scaling of MOS Circuits MCQs ( VLSI ) Mcqs. Past papers of Scaling of MOS Circuits MCQs ( VLSI ) Mcqs . Mcqs are the necessary part of any competitive / job related exams. The Mcqs having specific numbers in any written test. It is therefore everyone have to learn / remember the related Scaling of MOS Circuits MCQs ( VLSI ) Mcqs. The Important series of Scaling of MOS Circuits MCQs ( VLSI ) Mcqs are given below:

Scaling Factors -1

1. Microelectronic technology cannot be characterized by
a) minimum feature size
b) power dissipation
c) production cost
d) designing cost
Answer: d
Explanation: Microelectronic technology can be characterized by minimum feature size, number of gates on one chip, power dissipation, die size, production cost, etc and not by designing cost.


2. Which model is used for scaling?
a) constant electric scaling
b) constant voltage scaling
c) costant electric and voltage scaling
d) costant current model
Answer: c
Explanation: Constant electric scaling model and constant voltage scaling model is used for scaling.


3. α is used for scaling
a) linear dimensions
b) vdd
c) oxide thickness
d) non linear
Answer: a
Explanation: α is used as the scaling factor for linear dimensions where as β is used for supply voltage Vdd, gate oxide thickness etc.


4. For constant voltage model,
a) α = β
b) α = 1
c) α = 1/β
d) β = 1
Answer: d
Explanation: For constant voltage model, β = 1 and 1/β is chosen for the scaling for all voltages.


5. For constant electric field model,
a) β = α
b) α = 1
c) α = 1/β
d) β = 1
Answer: a
Explanation: For constant voltage model, β = α.


6. Gate area can be given as
a) L/W
b) L * W
c) 2L/W
d) L/2W
Answer: b
Explanation: Gate area Ag can be given as the product of length and the width of the channel.


7. Gate area is scaled by
a) α
b) 1/α
c) 1/α²
d) α²
Answer: c
Explanation: Gate area is given as the product of length and width of the channel and it can be scaled by 1/α².


8. Gate capacitance per unit area is scaled by
a) α
b) 1
c) 1/β
d) β
Answer: d
Explanation: Gate capacitance per unit area is scaled by β and this is given by €ox/D.


9. Parasitic capacitance is given by
a) Ax/d
b) Ax * d
c) d/Ax
d) Ax
Answer: a
Explanation: Parasitic capacitance is given by Ax/d where Ax is the area of the depletion region and d is the depletion width.


10. Parasitic capacitance is scaled by
a) β
b) 1/β
c) α
d) 1/α
Answer: d
Explanation: Parasitic capacitance is scaled by 1/α because area is scaled by 1/α² and d by 1/α. Thus (1/α²)/(1/α) we will get 1/α.

Scaling Factors -2

1. Carrier density is scaled by
a) α
b) β
c) 1
d) α²
Answer: c
Explanation: Carrier density in channel Qon is scaled by 1. Carrier density is given by C0*Vgs where C0 is scaled by β and Vgs is scaled by 1/β.


2. Channel resistance Ron is scaled by
a) α
b) β
c) 1
d) α²
Answer: c
Explanation: Channel resistance Ron is scaled by 1. Channel resistance is given by (L/W)*(1/Qonµ).


3. Gate delay is given by
a) Ron/Cg
b) Ron * Cg
c) Cg/Ron
d) Cg² /Ron
Answer: b
Explanation: Gate delay Td is given as the product of Ron, channel resistance and Cg the gate capacitance.


4. Maximum operating frequency is scaled by
a) α/β
b) β/α
c) α² /β
d) β² /α
Answer: c
Explanation: Maximum operating frequency f0 is scaled by α²/β. This is given by (W/L)*(µ*C0*Vdd/Cg).


5. Saturation current is scaled by
a) α
b) β
c) 1/α
d) 1/β
Answer: d
Explanation: Saturation current Idss is scaled by 1/β. This is given by (Co*µ/2)*W/L*(Vgs-Vt)² .


6. Vgs is scaled by
a) α
b) β
c) 1/α
d) 1/β
Answer: d
Explanation: Gate to source voltage Vgs is scaled by 1/β. All voltages are scaled by 1/β.


7. Current density J is scaled by
a) α/β
b) β/α
c) α²/β
d) β²/α
Answer: c
Explanation: Current density J is scaled by α^2/β. Current density is given by Idss/A where Idss is scaled by 1/β and area A by 1/α^2.


8. Power dissipation per gate is scaled by
a) 1/α
b) 1/β
c) 1/α²
d) 1/β²
Answer: d
Explanation: Power dissipation per gate is scaled by 1/β^2. This is the sum of static component Pgs and dynamic component Pgd.


9. Power dissipation per unit area is scaled by
a) 1/α
b) 1/β
c) β²/α²
d) α²/β²
Answer: d
Explanation: Power dissipation per unit area Pa is scaled by α²/β². This is given by Pg/Ag where Pg is scaled by 1/β² and Ag by 1/α²


10. In constant voltage model, the saturation current is scaled by
a) α
b) β
c) 1
d) β²
Answer: c
Explanation: Saturation current is scaled by 1 in constant voltage model. This is because saturation current is scaled by 1/β and here in constant voltage model β is 1.


11. In constant field model, maximum operationg frequency is scaled by
a) α
b) β
c) α²
d) β²
Answer: a
Explanation: In constant field model, maximum operating frequency is scaled by α. Maximum operating frequency is scaled by α²/β and here in this model β = α.


12. In constant electric field model, power dissipation per unit area is scaled by
a) α
b) β
c) 1
d) β²
Answer: c
Explanation: Power dissipation per unit area is scaled by 1 in constant electric field model. This is scaled by α²/β² and here in constant electric field model β = α.

Limitations of Scaling -1

1. Built-in junction potential Vb depends on
a) Vdd
b) Vgs
c) substrate doping level
d) oxide thickness
Answer: c
Explanation: Built-in junction potential Vb depends on the substrate doping level and this will be acceptable so long as Vb is small compared with Vdd.


2. As the channel length is reduced in a MOS transistor, depletion region width must be
a) increased
b) decreased
c) must not vary
d) exponentially decreased
Answer: b
Explanation: As the channel length is reduced in a MOS transistor, depletion width must also be scaled down to prevent the source and drain depletion regions from meeting.


3. Vdd is scaled by
a) α
b) β
c) 1/α
d) 1/β
Answer: d
Explanation: Supply voltage Vdd is scaled by 1/β. All voltages are scaled by 1/β.


4. If doping level of substrate Nb increases then depletion width
a) increases
b) decreases
c) does not change
d) increases and then decreases
Answer: b
Explanation: If the substrate doping length Nb increases then depletion width decreases because depletion width is inversely proportional to Nb.


5. Maximum electric field can be given as
a) V/d
b) d/V
c) 2V/d
d) d/2V
Answer: c
Explanation: Maximum electric field can be given by 2V/d and this is induced in one-sided step junction.


6. The size of a transistor is usually defined in terms of its
a) channel length
b) feature size
c) width
d) thickness ‘d’
Answer: a
Explanation: The size of a transistor is usually defined in terms of its channel length L because feature size only gives area capacitance etc.


7. What is the minimum value of L to maintain transistor action?
a) d
b) d/2
c) 2d
d) d²
Answer: c
Explanation: The channel length L should be atleast 2d to maintain the transistor action and to prevent punch-through.


8. L depends on
a) substrate concentration
b) Vgs
c) Vt
d) Vds
Answer: a
Explanation: Channel length L depends on the supply voltage Vdd and substrate concentration Nb.


9. Drift velocity can be given as
a) E/µ
b) µ/E
c) µ * E
d) E
Answer: c
Explanation: Carrier drift velocity can be given as the product of µ and E and the maximum carrier drift velocity is approximately equal to Vsat regardless of the supply voltage.


10. The transit time can be given as
a) 2d
b) 2d/µE
c) µE/d
d) µE/2d
Answer: b
Explanation: The transit time can be given by L/Vdrift which is equivalent to 2d/µE as L = 2d and Vdrift is µE.

Limitations of Scaling -2

1. Maximum transit time occurs when the size of the transistor is
a) minimum
b) maximum
c) does not depend on size
d) double
Answer: a
Explanation: Maximum transit time occurs when the size of the transistor is minimum when Va is approximately 0.


2. The spacing of interconnect is scaled by
a) α
b) 1/α
c) α²
d) 1/α²
Answer: b
Explanation: Spacing of interconnect, width and thickness are scaled by 1/α as they are linear dimensions.


3. Cross section area is scaled by
a) α
b) 1/α
c) α²
d) 1/α²
Answer: d
Explanation: Cross section area is scaled by 1/α² as area is the product of length and width which are scaled by 1/α.


4. The decrease in device dimension ______ the die size.
a) increases
b) decreases
c) does not affect
d) decreases and then increases
Answer: a
Explanation: The decrease in device dimension increases the die size and also the levels of integration.

Basic Circuit Concepts MCQs

5. The reduction in die size reduces
a) R
b) d
c) L
d) W
Answer: a
Explanation: The reduction in die size also reduces R and C. Die size depends on both resistor and capacitor.


6. The propogation delay along the optical fiber interconnect can be given as
a) n/Lx
b) nL/c
c) c/nL
d) nc/L
Answer: b
Explanation: The propogation delay along the optical fiber interconnect can be given as nL/c where n is the refractive index, L is the length of the fiber and c is the speed of light.


7. The breakdown voltage can be reduced by _____ electric field strength.
a) increasing
b) decreasing
c) does not depend
d) exponentially decreasing
Answer: a
Explanation: The increase in electric field strength lowers the breakdown voltages. Electric field is inversely proportional to the voltage.


8. Greater the switching speed _____ is the more.
a) low
b) more
c) all of the mentioned
d) none of the mentioned
Answer: b
Explanation: Increase in switching speed increases the noise problems. Switching speed is the rate a which the logic level varies.


9. Substrate concentration is scaled by
a) α
b) 1/α
c) α²
d) 1/α²
Answer: a
Explanation: Substrate concentration Nb which gives the doping level of substrate is scaled by α.


10. The increase in operating frequency results in ______ in cross-talk noise.
a) increase
b) decrease
c) no change
d) doubling
Answer: a
Explanation: The increase in operating frequency and reduction in rise time tr results in the increase of cross-talk noise.


11. Flicker noise is scaled by
a) 1/α²
b) α²/β²
c) 1/β²
d) β²/α²
Answer: b
Explanation: Flicker noise occurs due to fluctuations of carriers trapped in the channel by surface states. It is scaled by α²/β².


12. Scaling affects _____ generated noise.
a) internally
b) externally
c) internally and externally
d) does not generate
Answer: c
Explanation: Scaling affects both internally and externally generated noise and this degrades both the production yeild and the reliability of high density chip layouts.

MOS Circuit Scaling – 1

1. The basic figures of merit for MOS devices are
a) Minimum Feature size
b) Low Power dissipation
c) Maximum operational frequency
d) All of the mentioned
Answer: d
Explanation: All the mentioned are the basic figures of merit for MOS devices.


2. For the constant field model, the scaling factors β and α are related as:
a) β = α
b) α = 2β
c) β = 1
d) β = α = 0
Answer: a
Explanation: In Constant field model, β = α.


3. In Constant Voltage model, the scaling factors β and α are related as:
a) β = α
b) α = 2β
c) β = 1
d) β = α = 1
Answer: c
Explanation: In Constant Voltage model, β = 1.


4. The scaling factor for the supply voltage VDD is:
a) 1
b) 0
c) 1/α
d) 1/β
Answer: d
Explanation: The supply voltage VDD has the scaling factor of 1/β.


5. The scaling factor of length and width of the channel are:
a) 1, 1
b) 1/α, 1/β
c) 1/α, 1/α
d) 1/β, 1/β
Answer: c
Explanation: The scaling factor of length is 1/α, and scaling factor for width is 1/α.


6. The third type of scaling model is:
a) λ-based model
b) µm based model
c) combined voltage and dimension model
d) combined voltage and electric field model
Answer: c
Explanation: The third model is known as the combined voltage and dimensions model proposed by Bergmann in 1991.


7. The scaling factor of gate area in constant voltage model is:
a) 1/α²
b) 1/β²
c) 1
d) All of the mentioned
Answer: a
Explanation: The gate area = L.W, therefore scaling factor = 1/α².


8. The scaling factor of Gate Capacitance per unit area is:
a) 1/β
b) 1/α
c) β
d) α
Answer: c
Explanation: Gate capacitance per unit area has the scaling factor of β.


9. The scaling factor of Gate capacitance is:
a) 1/β
b) 1/α
c) β/α²
d) α/β²
Answer: c
Explanation: The scaling factor of Gate capacitance is β/α².


10. In Constant voltage model the gate capacitance is scaled by a factor of:
a) 1/β²
b) 1/α²
c) β/α²
d) α/β²
Answer: b
Explanation: Since β is 1.


11. The parasitic Capacitance has the scaling factor:
a) Equal to gate capacitance
b) 1/α²
c) 1/α
d) 1/β
Answer: c
Explanation: Parasitic capacitance is scaled by 1/α.


12. The carrier density in channel in constant voltage model is scaled as:
a) 1/β
b) 1
c) β
d) All of the mentioned
Answer: d
Explanation: Carrier density is scaled as 1, since in constant voltage model β = 1, therefore all are correct.


13. Carrier density is measured as:
a) Average charge per unit area in the channel in ‘OFF’ state
b) Average charge per unit area in the channel in ‘ON’state
c) Average charge per unit area in the gate oxide
d) None of the mentioned
Answer: b
Explanation: Carrier density is the Average charge per unit area in the channel in ‘ON’ state.


14. Channel resistance is scaled as:
a) 1/α²
b) 1/β
c) 1/α
d) 1
Answer: d
Explanation: Channel resistance is scaled by the factor of 1.


15. The scaling factor of Gate delay in Constant field model is:
a) 1/α²
b) 1
c) 1/α
d) β/α
Answer: c
Explanation: In Constant field model the scaling factor of gate delay is 1/α.

MOS Circuit Scaling – 2

1. The gate delay is proportional to:
a) Ron .Cg
b) Rs.Cds
c) Rd.Cgs
d) Ron.Cox
Answer: a
Explanation: The gate delay is proportional to channel resistance and gate capacitance


2. The maximum operating frequency is scaled by:
a) 1/α²
b) β/α²
c) α²/β
d) 1
Answer: c
Explanation: Maximum operating frequency s inversely proportional to the gate delay. It is scaled by α²/β


3. The saturation current is scaled by the factor of:
a) 1
b) 1/α²
c) 1/β
d) 1/α
Answer: c
Explanation: The saturation current is scaled by the factor of 1/β


4. The scaling factor of current density in constant voltage model is:
a) 1/α²
b) 1
c) α²
d) α²/β
Answer: c
Explanation: Current density is scaled by a factor of α²/β and since it is in Constant voltage model, β = 1, therefore α² is correct answer


5. Switching energy per gate is scaled by the factor of:
a) 1
b) α²/β
c) 1/ β.α²
d) α²
Answer: c
Explanation: Switching energy per gate is scaled by a factor of 1/ β.α²


6. In Constant field model, the scaling factor of switching energy per gate would be:
a) 1/ β.α²
b) 1/ α³
c) 1/ α²
d) All of the mentioned
Answer: b
Explanation: Since in constant field model α = β


7. The power dissipation per gate is scaled as:
a) 1
b) 1/ β.α²
c) α²/β
d) 1/ β²
Answer: d
Explanation: Power dissipation per gate is scaled by the factor of 1/β²


8. The dynamic component of power dissipation is given by:
a) P = I².Rd
b) P = Vdd²/Rd
c) P = Eg.fo
d) All of the mentioned
Answer: c
Explanation: The dynamic component is the product of energy per gate and maximum operating frequency.


9. The static component of power dsssipation is given by:
a) P = I².Rd
b) P = Vdd²/Ron
c) P = Eg.fo
d) All of the mentioned
Answer: b
Explanation: The static component is the power dissipated across transistor when it is in ON state


10. The scaling factor of power dissipation per unit area is:
a) 1
b) 1/α²
c) 1/ β.α²
d) α²/β²
Answer: d
Explanation: The scaling factor of power dissipation per unit area is α²/β²


11. The power speed product has the scaling factor of:
a) 1
b) 1/α²
c) 1/ β.α²
d) None of the mentioned
Answer: c
Explanation: The power speed product has the scaling factor of 1/ β.α²


12. The scaling factor of power dissipation per unit area in constant field model is:
a) 1
b) 1/α²
c) 1/ β.α²
d) α²/β²
Answer: a
Explanation: In constant field model α = β


13. The scaling factor of Logic Level 1 in constant field model is:
a) 1
b) 1/β
c) 1/α
d) α/β
Answer: c
Explanation: The logic level 1 is scaled as 1/β. Since we are using constant field model, the scaling factor will be 1/α


14. The scaling factor similar to scaling factor of power speed product is:
a) Power dissipation per unit area
b) Switching Energy
c) Power dissipation per gate
d) All of the mentioned
Answer: b
Explanation: Switching energy has the same scaling factor as that of power speed products.


15. The parameter which is not scaled to any factor is:
a) Power speed product
b) Switching energy
c) Channel resistance
d) All of the mentioned
Answer: c
Explanation: Channel resistance is scaled by 1. Therefore there are no factors like α or β.

Up To Date Scaling of MOS Circuits MCQs ( VLSI ) MCQs – Latest VLSI MCQs